Please be aware that this document is based on my basic understanding of the topic. The information in here might be incorrect or incomplete, and I recommend that you double-check this info against other reliable sources.
Ramin Anushiravani
10/21/2025
This document explains how Analog-to-Digital Converters (ADCs) translate continuous analog signals into discrete digital values using parameters like bit depth, voltage reference, and gain. It details how this quantization process creates trade-offs between resolution (LSB) and quantization noise (SNR). Finally, it covers the role of sampling rates and anti-aliasing filters in accurately capturing the signal's frequency content without distortion (aliasing).
The brain produces analog signals, continuous voltage that can take any value. The ADC, analog to digital converter, is the component that does this translation.
Every ADC has a reference voltage, Vref. It defines the top and bottom of what the ADC can measure. ADC is differential, so a span of 2.4V means it can measure from -1.2V to 1.2V. ADC can take voltage within a range, -1.2V to 1.2V, and assigns each interval of voltage a digital code. Anything beyond this region gets saturated; the ADC output just flatlines at its maximum digital code.
Quantization rounds the continuous voltage to the nearest available code. If analog input is a ramp, ADC is a staircase. Each stair step corresponds to one LSB (Least Significant bit). The finer the steps, the closer the digital version is to the real signal. The ADC resolution, number of bits, determines how precisely you can measure small voltage changes. That range is the reference voltage that determines how large a signal can be measured before saturation, clipping. These two together set the quantization granularity, the smallest detectable change. If ADC has 10 bits of resolution it can represent 210 values. Each bin would correspond to one discrete code, integers from -512 to +511.
The LSB represents the voltage difference between two adjacent digital codes. The LSB is the bridge between physical voltage and digital code. Mathematically,
LSB = (2 × Vref) / 2N
Where N is the bit depth.
If ADC range is ±1.2V and it has 10 bits, then the step size is 2.4V / 1024 = 2.34mV per code. Code 0 is -1.2V, and code 1 is -1.1977V, etc. Each step differs exactly by one LSB = 2.34mV. We usually call this step size LSB when measured in volts.
The neural signals produce much smaller voltages, thousands times smaller, so if you directly connect to ADC it would read as zero because each step is 2.34mV. That’s where the amplifier, gain, comes in. The amplifier simply multiplies the electrode voltage by a constant factor.
VADCinput = Gain × Velectrode
The amplifier brings the neural signals into a range that ADC can digitize accurately. While the LSBADC is 2.34mV/code, the LSB at electrode level is smaller because the amplifier multiplies that voltage by a gain. At 250 gain, the LSBelectrode is 9.375μV/code.
LSBelectrode = Vref / (2N × G)
Vmax, electrode = Vref / G
The gain affects both range and resolution equally. With smaller LSB you can detect smaller voltages but it also comes with smaller input ranges that saturate more easily, clipping risk. This means the amplifier must make sure that the largest expected electrode signal doesn’t exceed this range.
|VADCinput| ≤ Vref
|G × Velectrode| ≤ Vref
|Velectrode| ≤ Vref / G
The maximum electrode voltage you can measure without saturation is inversely proportional to the gain.
| Gain | Max ADC input | Electrode range peak-to-peak |
|---|---|---|
| x 250 | ±1.2V | 4.8mV |
| x 500 | ±1.2V | 2.4mV |
| x 1000 | ±1.2V | 1.2mV |
So far, ADC converts continuous voltage, analog signals into discrete digital signals. Vref is the max voltage ADC can see, quantization is rounding to the nearest integer, and LSB is how wide each step is.
If you multiply the LSB by the total number of steps you get the total measured voltage span.
Vmax = (2(N-1) - 1) × LSB
This is the largest input voltage the ADC input can see before saturation.
Changing the LSB directly changes the measured voltage range. For example, at LSB 2.34V, where gain setting is 2, the Vmax is ±1.2V. Smaller LSB means higher resolution but smaller maximum voltage.
Because ADC converts a continuous analog voltage to a discrete digital code, it must round the input to the nearest quantization level. This rounding introduces a quantization error. If LSB is 4.7μV, then any voltage between 10-14.7μV is rounded to the nearest code of 14.7μV. The max quantization error is LSB/2, so even a noiseless perfect signal would have 2.3μV uncertainty because of digitization.
If you plot the quantization error for a slowly increasing signal it would look like a saw-tooth wave, ramps linearly between -½ LSB to +½ LSB, because the ADC snaps to the next step. For a real neural signal the waveform continuously changes at ADC step boundaries, so each crossing is where a sawtooth cycle resets. If you overlay these sawtooth error cycles but with slightly shifted phases they no longer line up, it blurs together like random noise. There’s no bias in quantization error, it’s zero, and the probability of any particular error value is roughly constant. That’s a definition of a uniform random variable, hence we treat quantization error as a uniform noise with
σ2q = LSB2 / 12 with mean 0.
The signal to noise ratio (SNR) compares the strength of your desired signal to the background noise level.
SNR = Psignal / Pnoise
In decibels (dB) this is
SNRdB = 10 log10(Psignal / Pnoise)
Consider a full-cycle sine wave of amplitude A.
Psignal = A2 / 2 where A is the maximum measurable voltage
If the ADC has 2N codes, each spaced by 1 LSB, then
A = (2(N-1) - 1) × LSB ≈ 2(N-1) × LSB
Pnoise = LSB2 / 12
SNR = 6 × (2(N-1))2 = 1.5 × 4(N-1) ≈ 6.02N + 1.76
Each additional bit increases SNR by 6 dB, which means twice the resolution or half the quantization noise amplitude.
So far we discussed the amplitude axis controlled by the LSB. The time axis is controlled by the sampling rate. The sampling rate tells you how many samples per second ADC can take. The signal bandwidth links to this sampling rate,
fs ≥ 2 × fmax
Where fmax is the highest frequency component of your analog signal and fs / 2 is the Nyquist frequency. If you sample lower than that, the high frequency part of the signal folds back into lower frequencies and you get aliasing.
Mathematically, what sampling actually does,
x[n] = x(t) | t = nTs where Ts = 1 / fs
You keep samples every Ts seconds. This is similar to multiplying the continuous signal by a train of delta spike spaced by Ts. In the frequency domain that multiplication corresponds to repetition of the signal’s spectrum every fs. If those repeats overlap you mix the frequencies. This is a fundamental property of the Fourier Transform, periodicity in one domain is repetition in the other domain. Multiplication in one domain is convolution in the other domain.
xs(t) = x(t) × train(t)
Multiplying the time domain by this train of spikes is convolving the spectrum with the frequency domain of that train. Convolution with spikes is replicating your original spectrum at each spike location.
Before sampling,
Frequency content:
|------ Useful spectrum -------|
0 f
After sampling,
Frequency content (sampled):
|------|------|------|------|
0 fs 2fs 3fs 4fs
↑ ↑
original repeated copies
Say the ADC sampling rate is 1 kHz, that means we sample every 1 ms. If our analog signal was a sine wave at 600 Hz, each cycle would last 1.67 ms. Because ADC can only represent up to Nyquist frequency of 500 Hz, anything above that mirrors back around 500 Hz.
Falias = |fsig - fs| = 400 Hz
Two different analog frequencies produce identical sample sequences when sampled at 1 kHz. Another way to look at aliasing is through phase. A sine wave of frequency fsig completes one full 360° rotation at each period T = 1 / fsig. So, the phase is,
phase(t) = 2π × fsig × t
x(t) = sin(2π × f × t)
At 1 kHz with a 600 Hz sine wave, we won’t land on the same phase each time, the phase advances by some amount between samples. Because of the skipping ahead in cycles it shows up as lower frequencies, aliasing. The phase jumps around so much between samples that the ADC’s reconstruction sees a lower frequency mirror. This happens if you move more than 180° per sample, you skip ahead too far and the sample looks like a slower reverse motion at 400 Hz. At 600 Hz with 1 kHz the phase advances by 360 × 600 / 1000 = 216°
Higher sampling rate means more data, higher power and better temporal precision. The quantization noise is spread over the full Nyquist band, so increasing the sampling rate spreads the noise thinner per Hz, slightly improving SNR per bandwidth.
If you can’t increase the sampling rate, you can still avoid aliasing using anti-aliasing filtering. Before the ADC samples your analog signal the system inserts an analog low-pass filter, called anti-aliasing filter, that removes all frequencies above the Nyquist frequency. This filter chops off the high frequency parts of the signal so they can’t fold back.
Analog Signal → [Low-pass Filter] → ADC → Digital samples
The anti-aliasing low-pass cutoff is a little below Nyquist. Because filtering is not perfect, we typically oversample slightly so the filtering design constraint is easy for digital downsampling later.
Filters have a transition band and it doesn’t suddenly go from 100% pass to 100% block, it rolls off gradually. A filter’s cut off is the point where the output power has fallen to half of its input power. Half power corresponds to -3 dB in amplitude, about 0.7 of output’s amplitude.
The roll-off is the rate at which the filter attenuates the signals beyond the cutoff and it’s measured in dB per decade. A decade is 10x frequency.
It’s how sharp the transition band is. The filter order adds another stage that makes the roll-off steeper. Higher order means steeper cutoff, stronger rejection of unwanted frequencies but also more complexity, more power and more phase distortion. If the Nyquist is close to the signal bandwidth, you need a filter that attenuates everything beyond Nyquist very strongly, that’s a higher-order filter.
Let’s take a look at our aliasing example again. At 500 Hz cutoff frequency, the filter is only down at -3dB. Strong 600 Hz components would still leak through with full strength and alias down to 400 Hz, so you need to set the cutoff frequency lower so the attenuation is great, about -40 dB. The actual cutoff would depend on the filter and its order. A first order filter attenuates at -20 dB per decade and this gets multiplied by 2 by increasing the order by 1.
If you want at least -40dB by 500 Hz, then you must start your filter roll-off at 400 Hz, where it’s -3 dB. For an n-th order butterworth low-pass filter, we have,
|H(f)| = 1 / sqrt(1 + (f / fc)2n)
And the attenuation is
A(f) = 20 × log10(1 / |H(f)|)
For a first order filter with cutoff frequency at 400 Hz we can compute attenuation at 500 Hz,
A(500) = 20 × log10(sqrt(1 + (500 / 400)2)) = 4.1 dB
This is very shallow. At order of 4, this is about 8.4 dB. If you want,
A(500) = 40 then,
10 × log10(1 + (500 / fc)2n) = 40
fc = 500 / (9999(1/2n))
For n = 8 to get -40 dB at 500 Hz the cutoff frequency would be at 281 Hz. Remember that using higher order filters comes with side effects, phase shift. If your signal contains many frequencies at once then each component might get delayed by a different amount and when you combine them the timing is no longer aligned. The waveform shape is altered even if the spectrum looks fine. Common IIR filters like butterworth have non-linear phases outside their transition bands. The higher the order the more non-linearity and more total phase delay. That’s why sometimes it’s wiser to use two lower-order filters cascaded than one higher order filter.
We’re typically interested in signals up to 250 Hz. For example high gamma signals are around 70-200 Hz. At 1 kHz sampling rate, with 500 Nyquist frequency, we can capture this band using a high-order filter. The timing of HGA can be slightly skewed because the filter's group delay ripples can extend well into 200 Hz.
In summary, this document outlined the fundamentals of Analog-to-Digital Conversion. It covered how ADCs use bit depth and voltage references to quantize signals (LSB), the importance of gain for signal amplification and managing the signal-to-noise ratio (SNR), and the critical role of sampling rates and anti-aliasing filters in accurately representing a signal's frequency content without distortion (aliasing).